1. Field
The following description relates to a simulation apparatus and method for a multicore system, and in addition, to a simulation apparatus and method for a multicore system that uses timing information of modules in the multicore system.
2. Description of the Related Art
Multicore systems are equipped with two or more processing cores that are capable of processing one or more tasks in parallel. The performance of a multicore system can be improved by appropriately distributing tasks between a plurality of processing cores in an effort to handle applications suitable for parallel processing. Multicore systems can deliver better performance at lower costs through parallel processing in comparison to single-core systems.
However, multicore systems generally need more components such as processing cores, memories, direct memory access controllers (DMAC), interrupt controllers (ITCs), timers, and the like, in comparison to the single-core systems. Accordingly, the connections between components are typically more complicated in a multicore system than in a single-core system. Based on the architecture of a multicore system it is possible to improve the performance of the multicore system and reduce the power consumption of multicore system.
To simulate different multicore architectures and evaluate the performance of different multicore architectures, components and communication architectures of each multicore architecture may be implemented as modules. The modules may be used to facilitate the reconfiguration of each multicore architecture and the modification of parameters (such as memory capacity). In addition, appropriate processing techniques may be required to properly transmit data and control signals between the modules.
Conventional module-based multicore simulators perform a function call using buses or signal protocols to handle the communication between modules. However, repeated function calls for each module may incur a considerable amount of simulation overhead which can reduce the overall system efficiency.